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irsm836 - 015ma 1 www.irf.com ? 20 14 international rectifier submit datasheet feedback february 13, 2014 1 a, 50 0v integrated power module for small appliance motor drive applications description irsm836 - 015ma is a 1 a, 50 0v integrated power module (ipm) designed for advanced appliance motor drive applications such as energy efficient fans and pumps. ir's technology offers an extremely compact, high performance ac motor - driver in an isolated package. this advanced ipm offer s a combination of ir's low r ds(on) trench mosfet technology and the industry benchmark 3 - phase high voltage, rugged driver in a small pqfn package. at only 12x12mm and featuring integrated bootstrap functionality, the compact footprint of this surface - mou nt package makes it suitable for applications that are space - constrained. integrated over - current protection, fault reporting and under - voltage lockout functions deliver a high level of protection and fail - safe operation. irsm836 - 015ma functions without a heat sink. features ? integrated gate drivers and bootstrap functionality ? open - source for leg - shunt current sensing ? protection shutdown pin ? low r ds(on) trench fredfet ? under - voltage lockout for all channels ? matched propagation delay for all channels ? optimized dv/dt for loss and emi trade offs ? 3.3v schmitt - triggered active high input logic ? cross - conduction prevention logic ? motor power range up to ~ 4 0 w, without heat sink ? isolation 1500vrms min base part number package type standard pack orderable part number form quantity irsm836 - 015ma 36l pqfn 12 x 12 mm tape and reel 2000 irsm836 - 015ma tr tray 800 irsm836 - 015ma all part numbers are pbf irsm836 - 015ma
irsm836 - 015ma 2 www.irf.com ? 20 14 international rectifier submit datasheet feedback february 13, 2014 internal electrical schematic irsm 836 - 015 ma 600 v 3 - phase driver hvic vcc hin 1 hin 2 hin 3 lin 1 lin 2 lin 3 fault itrip en vb 1 vb 2 vb 3 v + vss u , vs 1 v , vs 2 w , vs 3 rcin vru com vrv vrw absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the module may occur. these are not tested at manufacturing. all voltage parameters are absolute voltages referenced to vss unless otherwise stated in the table. symbol description min max unit bv dss mosfet blocking voltage --- 500 v i o @ t=25c dc output current per mosfet --- 1 a i op pulsed output current (note 1) --- 7 p d @ t c =25c maximum power dissipation per mosfet --- 11 w v iso isolation voltage (1min) (note 2) --- 1500 v rms t j operating junction temperature -40 150 c t l lead temperature (soldering, 30 seconds) --- 260 c t s storage temperature -40 150 c v s1,2,3 high side floating supply offset voltage v b1,2,3 - 20 v b1,2,3 +0.3 v v b1,2,3 high side floating supply voltage - 0.3 500 v v cc low side and logic supply voltage - 0.3 20 v v in input voltage of lin, hin, i trip , en, rcin, flt v ss - 0.3 v cc +0.3 v note 1: pulse width = 100s, tc =25c, duty=1%. note 2: characterized, not tested at manufacturing
irsm836 - 015ma 3 www.irf.com ? 20 14 international rectifier submit datasheet feedback february 13, 2014 recommended operating conditions symbol description min max unit v+ positive dc bus input voltage --- 4 0 0 v v s1,2,3 high s ide floating s upply offset v oltage ( note 3) 4 0 0 v v b1,2,3 high side f loating supply v oltage v s +12 v s +20 v v cc low side and l ogic s upply v oltage 1 3.5 16.5 v v in input v oltage of lin, hin, i t rip , en, flt 0 5 v f p pwm carrier frequency --- 2 0 khz the input/output logic diagram is shown in figure 1. for proper operation the module should be used within the recommended conditions. all voltages are absolute referenced to com. the v s offset is tested with all supplies biased at 15v differential . note 3 : logic operational for v s from com - 5v to com+ 250 v. logic state held for v s from com - 5v to com -v bs . static electrical characteristics (v cc - com) = (v b -v s ) = 15 v. t a = 25 o c unless otherwise specified. the v in and i in parameters are referenced to v ss and are applicable to all six channels. the v ccuv parameters are referenced to v ss . the v bsuv parameters are referenced to v s . symbol description min typ max units conditions bv dss drain -to - source breakdown voltage 500 --- --- v t j =25c , i lk =250 a i lkh leakage current of high side fet?s in parallel 1 a t j =25c , v ds =500v i lkl leakage current of low side fet?s in parallel plus gate drive ic 4 a t j =25c , v ds =500v r ds(on) drain to source on resistance --- 4.8 6 t j =25c, v cc =15 v , id = 0.5a v in,th+ positive g oing i nput t hreshold 2.5 --- --- v v in,th - negative g oing input t hreshold --- --- 0.8 v v ccuv+, v bsuv+ v cc and v bs s upply u nder -v oltage, positive going t hreshold 8 8.9 9.8 v v ccuv - , v bsuv - v cc and v bs supply u nder -v oltage, negative going t hreshold 7.4 8.2 9 v v ccuvh, v bsuvh v cc and v bs s upply u nder -v oltage l ock -o ut h ysteresis --- 0.7 --- v i qbs quiescent v bs s upply c urrent v in =0v --- --- 125 a i qcc quiescent v cc s upply c urrent v in =0v --- --- 3 . 5 ma i qcc , on quiescent v cc s upply c urrent v in = 4 v --- --- 10 ma i in+ input b ias c urrent v in = 4 v --- 1 3 0 160 a i in - input bias c urrent v in =0v --- -- 1 a i trip+ i trip b ias c urrent v itrip = 4 v --- 4 40 a i trip - i trip b ias c urrent v itrip =0v --- -- 1 a v it, th+ i trip t hreshold voltage 0.37 0.46 0.55 v v it, th - i trip t hreshold voltage --- 0.4 --- v
irsm836 - 015ma 4 www.irf.com ? 20 14 international rectifier submit datasheet feedback february 13, 2014 v it, hys i trip input hysteresis --- 0. 06 --- v r br internal bootstrap e quivalent resistor value --- 200 --- t j =25c v rcin,th rcin p ositive g oing t hreshold --- 8 --- v r on,fault flt open - drain r esistance --- 50 100 dynamic electrical characteristics (v cc - com) = (v b -v s ) = 15 v. t a = 25 o c unless otherwise specified. symbol description min typ max units conditions t on input to output p ropagation t urn -o n d elay t ime --- 1 1.5 s i d =1 m a, v + =50v see f ig. 2 t off input to output propagation turn -off delay t ime --- 1 1.5 s t f il,in input filter time (hin, lin) 2 00 3 6 0 --- ns v in =0 & v in = 4 v t f il,en input filter time ( en ) 100 200 --- ns v in =0 & v in = 4 v t blt - itrip i trip blanking time 100 330 ns v in =0 & v in =4v, v i/trip =5v t f au lt itrip to flt --- 590 950 ns v in =0 & v in = 4 v t en en falling to s witch t urn -o ff 750 950 ns v in =0 & v in = 4 v t itrip i trip to switch turn - off p ropagation d elay --- 1000 1200 ns i d =1a, v + =50v , s ee f ig ure 3 mosfet avalanche c haracteristics symbol description min typ max units conditions eas single pulse avalanche energy --- --- 49 note 4 mj see note 4 note 4: from characterization of to - 220 packaged devices. starting t j =25c, l= 27m h, vdd= 100v, i as =1.7a vgs=10v thermal and mechanical characteristics symbol description min typ max units conditions r th(j - c t ) total thermal r esistance junction to case top --- 28.9 --- c/w one device r th(j - c b ) total thermal r esistance junction to case bottom --- 3.8 --- c/w one device
irsm836 - 015ma 5 www.irf.com ? 20 14 international rectifier submit datasheet feedback february 13, 2014 qualification information ? qualification level industrial ?? (per jedec jesd 47e) moisture sensitivity level msl3 ??? (per ipc/jedec j - std - 020c) esd machine model class b (p er jedec standard jesd22 - a115) human body model class 2 (per standard esda /je dec js -001- 2012 ) rohs compliant yes ? qualification standards can be found at international rectifier?s web site http://www.irf.com/ ?? higher qualification ratings may be available should the user have such requirements. please contact your international rectifier sales representative for further information. ??? higher msl ratings may be available for the specific package types listed here. please contact your international rectifier sales representative for further information.
irsm836 - 015ma 6 www.irf.com ? 20 14 international rectifier submit datasheet feedback february 13, 2014 input/output pin equivalent circuit diagrams esd diode esd diode v b ho v s esd diode esd diode lo com 600 v 20 v clamp 25 v clamp v cc esd diode esd diode v cc rcin or fault v ss esd diode esd diode v cc hin , lin , or en v ss 33k 20 v clamp esd diode esd diode v cc itrip v ss 1m
irsm836 - 015ma 7 www.irf.com ? 20 14 international rectifier submit datasheet feedback february 13, 2014 input - output logic level table gate driver ic v+ u, v, w lo ho hin1,2,3 lin 1,2,3 en itrip hin1,2,3 lin1,2,3 u,v,w 1 0 1 0 v+ 1 0 0 1 0 1 0 0 0 off 1 1 x x off 0 x x x off figure 1 : input/output logic diagram i trip u , v , w lin 1 , 2 , 3 hin 1 , 2 , 3
irsm836 - 015ma 8 www.irf.com ? 20 14 international rectifier submit datasheet feedback february 13, 2014 figure 2a : input to output propagation turn - on delay time. figure 2b : input to output propagation turn - off delay time. figure 2c : diode reverse recovery. figure 2 : switching parameter definitions 50 % h in / l in v ds i d h in / l in t off t f 10% i d 50% v ce v ds i d h in / l in t on t r 50% h in /l in 90% i d 10% i d 50% v ds 90% i d v ds i f h in / l in t rr i rr
irsm836 - 015ma 9 www.irf.com ? 20 14 international rectifier submit datasheet feedback february 13, 2014 figure 3 : i trip timing waveform i trip lin 1 , 2 , 3 hin 1 , 2 , 3 t flt - clr 50 % 50 % u , v , w 50 % t itrip 50 %
irsm836 - 015ma 10 www.irf.com ? 20 14 international rectifier submit datasheet feedback february 13, 2014 module pin - out description pin name description 1 hin3 logic input for high side gate driver - phase 3 2 lin1 logic input for low side gate driver - phase 1 3 lin2 logic input for low side gate driver - phase 2 4 lin3 logic input for low side gate driver - phase 3 5 /flt fault output pin 6 itrip over - current protection pin 7 en enable pin 8 rcin reset programming pin 9, 39 vss, com ground for gate drive ic and low side gate drive return 10, 11 , 30, 37 u, vs1 output 1, high side floating supply offset voltage 12, 13 vr1 phase 1 low side fet source 14, 15 vr2 phase 2 low side fet source 16, 17, 38 v, vs2 output 2, high side floating supply offset voltage 18, 19 w, vs3 output 3, high side floating supply offset voltage 20, 21 vr3 phase 3 low side fet source 22-29 v+ dc bus voltage positive 31 vb1 high side floating supply voltage 1 32 vb2 high side floating supply voltage 2 33 vb3 high side floating supply voltage 3 34 vcc 15v supply 35 hin1 logic input for high side gate driver - phase 1 36 hin2 logic input for high side gate driver - phase 2 b 36 35 34 33 32 31 30 29 28 21 20 17 16 11 1 9 8 7 6 5 4 3 top view 2 27 10 19 18 37 38 39 12 13 14 15 23 22 25 24 26 note pads 37 and 38 can be omitted from the pcb footprint and hence do not need to be soldered all pins with the same name are internally connected. for example, pins 10, 11, 30 and 37 are internally connected.
irsm836 - 015ma 11 www.irf.com ? 20 14 international rectifier submit datasheet feedback february 13, 2014 fault reporting and programmable fault clear timer the irsm836 - 015ma provides an integrated fault reporting output and an adjustable fault clear timer. there are two situations that would cause the irsm836 - 015ma to re port a fault via the flt pin. the first is an under - voltage condition of vcc and the second is when the itrip pin recognizes a fault. the fault clear timer provides a means of automatically re - enabling the module operation a preset amount of time after the fault condition has disappeared. when a fault condition occurs, th e fault diagnostic output ( flt) stays in the low state until the fault condition has been removed and the fault clear timer expires; once the fault clear timer expires, the voltage on th e flt pin will return to the logic - high voltage. figure 4a is a block - level di agram that focuses on the fault diagnostic and fault clear timer functionality of the driver chip within the module . the fault clear timer is defined with a simple resistor - capac itor (rc) network on the rcin pin, as shown in figure 4b. figure 5 is a timing diagram showing the states of the flt and rcin pins during both normal operation and under a fault condition. under normal operation, both flt and rcin are in high impedance ( open drain) states. c rcin is fully - charged, and flt is pulled up high. w hen a fault condition occurs , rcin and flt are pulled low to v ss ? c rcin is discharged; once the fault condition has been removed, rcin returns to a high impedance state and the fault clear timer begins ? that is, c rcin starts charging via r rcin . t fltclr seconds later ? when the rcin voltage crosses a datasheet - defined threshold of v rcin,th , flt returns to a high impedance state and the module is operational again. t fltclr is det ermined by a simple rc network, shown in figure 6 - r rcin and c rcin determine how long the voltage at the rcin pin takes to reach the v rcin,th fixed threshold. figure 4 a: block diagram showing internal functioning of fault diagnostic and fault clear timer figure 4b : programming the fault clear timer v cc hin ( x 3 ) rcin en itrip v ss fault vrx lin ( x 3 ) v b ( x 3 ) v s ( x 3 ) irsm836 - 015ma i - r rcin c rcin
irsm836 - 015ma 12 www.irf.com ? 20 14 international rectifier submit datasheet feedback february 13, 2014 figure 5: rcin and flt pin waveforms the design guidelines for this network are shown in table 1 . c rcin needs to be small enough so that the discharge of the capacitor occurs before the fault condition disappears. if the fault condition disappears before the c rcin capacitor is sufficiently discharged, the module will be stuck in fault mode. to achieve suffi ciently high fault clear time, it is thus recommend r rcin be increased while c rcin be kept small. c rcin 1 nf ceramic r rcin 0.5 m to 2 m >> r on,rcin table 1 : design guidelines the length of the fault clear time period can be determined by using the formula below. ? ? 1 ? cc th rcin rcin rcin fltclr v v c r t , 1 ln if the fault clear timer functionality is not needed, it is sufficient to pull the rcin pin up to vcc with r rcin 10k?. in this case, c rcin is not needed. v cc v rcin time v rcin , th t fltclr v ss v fault time v ss itrip high impedance state
irsm836 - 015ma 13 www.irf.com ? 20 14 international rectifier submit datasheet feedback february 13, 2014 typical application connection irsm836 - 015ma irsm836-015ma hvic vcc hin1 hin2 hin3 lin1 lin2 lin3 fault itrip en vb1 vb2 vb3 u, vs 1 v, vs2 w, vs 3 rcin power supply pwmwh pwmvh pwmuh pwmvl pwmwl gatekill ain1 ifb+ ifb- ifbo vss vdd vddcap xtal0 xtal1 ain2 spd-ref vss com vbus irmck171 pwmul 4. 87k 2m 2m 1nf 0.5 6.04 k 6. 04 k 7.68k 1. electrolytic bus capacitors should be mounted as close to the module bus terminals as possible to reduce ringing and emi problems. additional high frequency ceramic capacitor mounted close to the module pins will further improv e performance. 2. in order to provide good decoupling between vcc - vss and vb1,2,3 - vs1,2,3 terminals, the capacitors shown connected between these terminals should be located very close to the module pins. additional high frequency capacitors, typically 0.1f, are recommended. 3. value of the boot - strap capacitors depends upon the switching frequency. their selection should be made based on application note an - 1044. 4. pwm generator must be disabled within fault duration to guarantee shutdown of the system. over - cur rent condition must be cleared before resuming operation.
irsm836 - 015ma 14 www.irf.com ? 20 14 international rectifier submit datasheet feedback february 13, 2014 current capability in a t ypical application figure 6 shows the current capability for this module at specified conditions. the current capability of the module is affected by application conditions including the pcb layout, ambient temperature, maximum pcb temperature, modulation scheme, pcb copper thickness and so on. the curves below were obtained from measurements carried out on the irmcs1471_r4 reference design board which includes the irsm836 - 015ma and ir?s irmck171 digital control ic. figure 6 : maximum sinusoidal phase current vs. pwm switch ing frequency sinusoidal modulation, v + =32 0 v, pf=0.9 8 0 50 100 150 200 250 300 350 6 8 10 12 14 16 18 20 rms current (ma) carrier frequency (khz) 320v, ?tca = 70 015ma, 3p 015ma, 2p
irsm836 - 015ma 15 www.irf.com ? 20 14 international rectifier submit datasheet feedback february 13, 2014 pcb example figure 7 below shows an example layout for the application pcb . the effective area of the v+ top - layer copper plane is ~ 3cm2 in this example. for an fr4 pcb with 1oz copper, r th(j -a) is about 40 c/w. a lower r th(j -a) can be achieved using thicker copper and/or additional layers . figure 7: pcb layout example and corresponding thermal image (10khz, 3p, 1oz, ?tca=70c, v+ = 320v, iu = 295marms) at the module?s typical operating conditions, dv/dt of the phase node voltage is influenced by the load capacitance which includes parasitic capacitance of th e pcb, mosfet output capacitance and motor winding capacitance. to turn off the mosfet, the load c apacitance needs to be charged by th e phase current. for the irmcs16 71 reference design, t urn - off d v /dt ranges from 2 to 5 v/ns depending on the phase current magnitude. turn - on d v /dt is influenced by pcb parasitic capacitance and motor winding capacitance and typically ranges from 4 to 6 v/ns. the mosfet turn - on loss combined with the complimentary bod y diode reverse recovery loss comprises the majority of the total switching losses. two - phase modulation can be used to reduce switching losses and run the m odule at higher phase currents . m odule
irsm836 - 015ma 16 www.irf.com ? 20 14 international rectifier submit datasheet feedback february 13, 2014 36l package outline irsm836 - 015ma (bottom view) dimensions in mm
irsm836 - 015ma 17 www.irf.com ? 20 14 international rectifier submit datasheet feedback february 13, 2014 36l package outline irsm836 - 015ma (bottom view) dimensions in mm
irsm836 - 015ma 18 www.irf.com ? 20 14 international rectifier submit datasheet feedback february 13, 2014 36l package outline irsm836 - 015ma (top and side view)
irsm836 - 015ma 19 www.irf.com ? 20 14 international rectifier submit datasheet feedback february 13, 2014 top marking 1.1 site code (h or c) 1.2 last 4 characters of the production order prior to ?.n? (n = 1 or 2 digit split indicator) 1.3 lead free released: p lead free samples: w engineering / doe: y 1.4 date code: yww (y = last digit of the production calendar year. ww is week number in the calendar year) 1.5 part number: irsm836 - 015ma 1.6 ir logo
irsm836 - 015ma 20 www.irf.com ? 20 14 international rectifier submit datasheet feedback february 13, 2014 revision history data and specifications are subject to change without notice ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252 - 7105 tac fax: (310) 252 - 7903 visit us at www.irf.c om for sales contact information

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